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74LS72 JK Master Slave Flip Flop – 7472
74LS72 JK Master Slave Flip Flop
And-Gated J-K Master-Slave Flip-Flops With Preset And Clear, 16-DIP (0.300?, 7.62mm)
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35.00 EGP
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Description
74LS72 JK Master Slave Flip Flop – 7472
Specifications
TYPE | DESCRIPTION | |
|---|---|---|
Category | Integrated Circuits (ICs) | |
Mfr | Texas Instruments | |
Series | 74LS | |
Package | Tube | |
Part Status | Active | |
Function | Set(Preset) and Reset | |
Type | JK Type | |
Output Type | Complimentary | |
Number of Elements | 2 | |
Number of Bits per Element | 1 | |
Clock Frequency | 45 MHz | |
Max Propagation Delay @ V, Max CL | 20ns @ 5V, 15pF | |
Trigger Type | Negative Edge | |
Current ? Output High, Low | 400?A, 8mA | |
Voltage ? Supply | 4.75V ~ 5.25V | |
Current ? Quiescent (Iq) | 6 mA | |
Operating Temperature | 0?C ~ 70?C (TA) | |
Mounting Type | Through Hole | |
Supplier Device Package | 16-PDIP | |
Package / Case | 16-DIP (0.300?, 7.62mm) | |
Base Product Number | 74LS112 |
Datasheet:
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